[1]吴丽丽.高电源噪声抑制比带隙基准源设计[J].华侨大学学报(自然科学版),2012,33(3):265-268.[doi:10.11830/ISSN.1000-5013.2012.03.0265]
 WU Li-li.Design of the Bandgap Reference with High Power Supply Rejection Ratio[J].Journal of Huaqiao University(Natural Science),2012,33(3):265-268.[doi:10.11830/ISSN.1000-5013.2012.03.0265]
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高电源噪声抑制比带隙基准源设计()
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《华侨大学学报(自然科学版)》[ISSN:1000-5013/CN:35-1079/N]

卷:
第33卷
期数:
2012年第3期
页码:
265-268
栏目:
出版日期:
2012-05-20

文章信息/Info

Title:
Design of the Bandgap Reference with High Power Supply Rejection Ratio
文章编号:
1000-5013(2012)03-0265-04
作者:
吴丽丽
华侨大学信息科学与工程学院
Author(s):
WU Li-li
College of Information Science and Engineering, Huaqiao University, Xiamen 361021, China
关键词:
带隙基准源 电源噪声抑制比 低工作电压 低功耗 模拟IP
Keywords:
bandgap reference power supply rejection ratio low working voltage low-power consumption analog intellectual property
分类号:
TN431.1
DOI:
10.11830/ISSN.1000-5013.2012.03.0265
文献标志码:
A
摘要:
采用CSMC 0.35μm工艺,通过在电源和带隙基准源电路间插入电流源缓冲级的方法,设计提高带隙基准源电源噪声抑制能力的带隙基准源.在最低工作电压不变的情况下,所设计的带隙基准电源大幅度提高了电路的电源抑制比,且功耗低.仿真结果表明:电源抑制比值为110dB/40dB,Iq=12μA,Vmin=2.4V,可作为模拟IP(知识产权)且易集成于单片系统中.
Abstract:
A band-gap voltage reference with a high power supply rejection ratio(PSSR) is designed by using CSMC 0.35 μm processing through the method of inserting current source buffer stage between power and band-gap reference circuit.The proposed band-gap reference greatly improve the circuit`s PSRR and with a low power cost,without changing the lowest working voltage.The simulation results show that,the PSRR with 100 dB/40 dB,Iq=12 μA,Vmin=2.4 V,which can be used as analog intellectual property(IP) and easily integrated in the system on a chip(SOC).

参考文献/References:

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备注/Memo

备注/Memo:
华侨大学科研基金资助项目(10HZR05)
更新日期/Last Update: 2014-03-23